A variety of different instruction sets for computer systems are known. In a basic RISC instruction set, all instructions have the same fixed length. Instructions having variable lengths, for example, are known where the length of the instruction is encoded within the instruction. This allows simple instructions to be shorter and thus code to be compressed in the program memory. However, it creates alignment problems on instruction fetches and decodes.
In another arrangement, a number of instructions are retrieved from memory in each instruction fetch, each instruction fetch having a certain bit length and each individual instruction (slot) having a certain bit length (so-called VLIW instructions). This overcomes alignment difficulties, because the fetch unit always fetches the same number of instructions. However the length of each instruction, and therefore the potential complexity of the instruction, is limited.
It is an object of the present invention to improve the flexibility of an instruction set, while maintaining fixed length instructions.